Initial commit
This commit is contained in:
		
						commit
						0b234caef8
					
				
					 4 changed files with 249 additions and 0 deletions
				
			
		
							
								
								
									
										1
									
								
								.gitignore
									
										
									
									
										vendored
									
									
										Normal file
									
								
							
							
						
						
									
										1
									
								
								.gitignore
									
										
									
									
										vendored
									
									
										Normal file
									
								
							|  | @ -0,0 +1 @@ | ||||||
|  | mainref.c | ||||||
							
								
								
									
										8
									
								
								README.md
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										8
									
								
								README.md
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,8 @@ | ||||||
|  | # Attiny85 adaptation of Ian Wraith's 2.4GHz Downconverter | ||||||
|  | 
 | ||||||
|  | STM32 | ATTINY85 | ADF4350 | ||||||
|  | ----- | -------- | ------- | ||||||
|  | PA02  |          | LE | ||||||
|  | PA05 (SPI SCK)| PB2 | CLK | ||||||
|  | PA07 (SPI MOSI)| PB0 | DATA | ||||||
|  | PA11  |          | LD | ||||||
							
								
								
									
										131
									
								
								common.h
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										131
									
								
								common.h
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,131 @@ | ||||||
|  | /*
 | ||||||
|  | ******************************************************************************** | ||||||
|  | *                                                                              * | ||||||
|  | * Copyright (c) 2017 Andrea Loi                                                * | ||||||
|  | *                                                                              * | ||||||
|  | * Permission is hereby granted, free of charge, to any person obtaining a      * | ||||||
|  | * copy of this software and associated documentation files (the "Software"),   * | ||||||
|  | * to deal in the Software without restriction, including without limitation    * | ||||||
|  | * the rights to use, copy, modify, merge, publish, distribute, sublicense,     * | ||||||
|  | * and/or sell copies of the Software, and to permit persons to whom the        * | ||||||
|  | * Software is furnished to do so, subject to the following conditions:         * | ||||||
|  | *                                                                              * | ||||||
|  | * The above copyright notice and this permission notice shall be included      * | ||||||
|  | * in all copies or substantial portions of the Software.                       * | ||||||
|  | *                                                                              * | ||||||
|  | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR   * | ||||||
|  | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,     * | ||||||
|  | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL      * | ||||||
|  | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER   * | ||||||
|  | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING      * | ||||||
|  | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER          * | ||||||
|  | * DEALINGS IN THE SOFTWARE.                                                    * | ||||||
|  | *                                                                              * | ||||||
|  | ******************************************************************************** | ||||||
|  | * This file contains common code meant to be included in every source file.    * | ||||||
|  | ******************************************************************************** | ||||||
|  | */ | ||||||
|  | 
 | ||||||
|  | #ifndef COMMON_H | ||||||
|  | #define COMMON_H | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | // *                          < Sized integer types >                          *
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | // * If you're including stdint.h you must remove the lines below.             *
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | #define int32_t     int | ||||||
|  | #define int16_t     short | ||||||
|  | #define int8_t      char | ||||||
|  | #define uint32_t    unsigned int | ||||||
|  | #define uint16_t    unsigned short | ||||||
|  | #define uint8_t     unsigned char | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | // *                          < Bitwise operations >                           *
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | // * BIT_SET(FOO, BIT_4 | BIT_2) -> set bit 4 and 2 of register FOO            *
 | ||||||
|  | // * BIT_CLR(FOO, BIT_4 | BIT_2) -> clear bit 4 and 2 of register FOO          *
 | ||||||
|  | // * BIT_CLR_SET(FOO, BIT_1 | BIT_5, BIT_2 | BIT_7)                            *
 | ||||||
|  | // *  -> clear bit 1 and 5 and set bit 2 and 7 of register FOO                 *
 | ||||||
|  | // *****************************************************************************
 | ||||||
|  | #define BIT_SET(REG, BITSET)     ( (REG) |= (BITSET) ) | ||||||
|  | #define BIT_CLR(REG, BITCLR)     ( (REG) &= (~(BITCLR)) ) | ||||||
|  | #define BIT_CLR_SET(REG, BITCLR, BITSET) ( (REG) = ( ( (REG) & (~(BITCLR)) ) | (BITSET) ) ) | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | #define BIT_0   0x00000001 | ||||||
|  | #define BIT_1   0x00000002 | ||||||
|  | #define BIT_2   0x00000004 | ||||||
|  | #define BIT_3   0x00000008 | ||||||
|  | #define BIT_4   0x00000010 | ||||||
|  | #define BIT_5   0x00000020 | ||||||
|  | #define BIT_6   0x00000040 | ||||||
|  | #define BIT_7   0x00000080 | ||||||
|  | #define BIT_8   0x00000100 | ||||||
|  | #define BIT_9   0x00000200 | ||||||
|  | #define BIT_10  0x00000400 | ||||||
|  | #define BIT_11  0x00000800 | ||||||
|  | #define BIT_12  0x00001000 | ||||||
|  | #define BIT_13  0x00002000 | ||||||
|  | #define BIT_14  0x00004000 | ||||||
|  | #define BIT_15  0x00008000 | ||||||
|  | #define BIT_16  0x00010000 | ||||||
|  | #define BIT_17  0x00020000 | ||||||
|  | #define BIT_18  0x00040000 | ||||||
|  | #define BIT_19  0x00080000 | ||||||
|  | #define BIT_20  0x00100000 | ||||||
|  | #define BIT_21  0x00200000 | ||||||
|  | #define BIT_22  0x00400000 | ||||||
|  | #define BIT_23  0x00800000 | ||||||
|  | #define BIT_24  0x01000000 | ||||||
|  | #define BIT_25  0x02000000 | ||||||
|  | #define BIT_26  0x04000000 | ||||||
|  | #define BIT_27  0x08000000 | ||||||
|  | #define BIT_28  0x10000000 | ||||||
|  | #define BIT_29  0x20000000 | ||||||
|  | #define BIT_30  0x40000000 | ||||||
|  | #define BIT_31  0x80000000 | ||||||
|  | 
 | ||||||
|  | #define MASK_0  0xFFFFFFFE | ||||||
|  | #define MASK_1  0xFFFFFFFD | ||||||
|  | #define MASK_2  0xFFFFFFFB | ||||||
|  | #define MASK_3  0xFFFFFFF7 | ||||||
|  | #define MASK_4  0xFFFFFFEF | ||||||
|  | #define MASK_5  0xFFFFFFDF | ||||||
|  | #define MASK_6  0xFFFFFFBF | ||||||
|  | #define MASK_7  0xFFFFFF7F | ||||||
|  | #define MASK_8  0xFFFFFEFF | ||||||
|  | #define MASK_9  0xFFFFFDFF | ||||||
|  | #define MASK_10 0xFFFFFBFF | ||||||
|  | #define MASK_11 0xFFFFF7FF | ||||||
|  | #define MASK_12 0xFFFFEFFF | ||||||
|  | #define MASK_13 0xFFFFDFFF | ||||||
|  | #define MASK_14 0xFFFFBFFF | ||||||
|  | #define MASK_15 0xFFFF7FFF | ||||||
|  | #define MASK_16 0xFFFEFFFF | ||||||
|  | #define MASK_17 0xFFFDFFFF | ||||||
|  | #define MASK_18 0xFFFBFFFF | ||||||
|  | #define MASK_19 0xFFF7FFFF | ||||||
|  | #define MASK_20 0xFFEFFFFF | ||||||
|  | #define MASK_21 0xFFDFFFFF | ||||||
|  | #define MASK_22 0xFFBFFFFF | ||||||
|  | #define MASK_23 0xFF7FFFFF | ||||||
|  | #define MASK_24 0xFEFFFFFF | ||||||
|  | #define MASK_25 0xFDFFFFFF | ||||||
|  | #define MASK_26 0xFBFFFFFF | ||||||
|  | #define MASK_27 0xF7FFFFFF | ||||||
|  | #define MASK_28 0xEFFFFFFF | ||||||
|  | #define MASK_29 0xDFFFFFFF | ||||||
|  | #define MASK_30 0xBFFFFFFF | ||||||
|  | #define MASK_31 0x7FFFFFFF | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | 
 | ||||||
|  | #endif | ||||||
|  | 
 | ||||||
							
								
								
									
										109
									
								
								main.c
									
										
									
									
									
										Normal file
									
								
							
							
						
						
									
										109
									
								
								main.c
									
										
									
									
									
										Normal file
									
								
							|  | @ -0,0 +1,109 @@ | ||||||
|  | #include<avr/io.h> | ||||||
|  | #include "common.h" | ||||||
|  | 
 | ||||||
|  | String tosend="Test"; | ||||||
|  | 
 | ||||||
|  | void Delay(uint32_t); | ||||||
|  | uint8_t SendReceiveSPIData(uint8_t); | ||||||
|  | void SendSPIDataADF4350 (uint32_t); | ||||||
|  | 
 | ||||||
|  | void spi_setup() | ||||||
|  | { | ||||||
|  |   // set direction of PB1 (DO) and PB2 (USCK) as output
 | ||||||
|  |   DDRB=(1<<PB1)|(1<<PB2); | ||||||
|  | 
 | ||||||
|  |   // set to three wire mode (SPI)
 | ||||||
|  |   USICR=(1<<USIWM0);           | ||||||
|  |   //USICR=(0<<USIWM1); not needed
 | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | int main() | ||||||
|  | { | ||||||
|  |   // set instructions to configure the ADF4350 settings for a 1 GHz +5dBm output
 | ||||||
|  | 	uint32_t ar0=0x500000; | ||||||
|  | 	uint32_t ar1=0x8008011; | ||||||
|  | 	uint32_t ar2=0x4e42; | ||||||
|  | 	uint32_t ar3=0x4b3; | ||||||
|  | 	uint32_t ar4=0xac803c; | ||||||
|  | 	uint32_t ar5=0x580005; | ||||||
|  | 
 | ||||||
|  |   spi_setup(); | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | // general purpose delay
 | ||||||
|  | void Delay(uint32_t tmax) | ||||||
|  | { | ||||||
|  | 	uint32_t i; | ||||||
|  | 	for (i=0;i < tmax ; i++)  | ||||||
|  | 		{ | ||||||
|  | 		asm("nop"); | ||||||
|  | 		} | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | // send an 8 bit word via SPI1 and receive an 8 bit word at the same time
 | ||||||
|  | uint8_t SendReceiveSPIData(uint8_t value) | ||||||
|  | { | ||||||
|  | 	uint8_t lout = 0; | ||||||
|  |   short int i=0; | ||||||
|  |    | ||||||
|  |   for(i=0;i<=3;i++) | ||||||
|  |   { | ||||||
|  |     USIDR=value[i];         // write data bytes in Data register, will cause them to get sent on clock
 | ||||||
|  |     while(USIOIF==0)        // check USI data counter overflow flag to detect the end of transmission every byte
 | ||||||
|  |     { | ||||||
|  |       USICR|=(1<<USICLK)|(1<<USITC);  // enable clock for transmission and generate clock for slave deivce
 | ||||||
|  |     } | ||||||
|  |     USISR|=(1<<USIOIF)      // clear USI data counter overflow flag
 | ||||||
|  |   } | ||||||
|  | 
 | ||||||
|  |   // Read in a 16 bit frame (replace with proper reading response thing)
 | ||||||
|  | 	///uint16_t inbyte = *(uint32_t *)(SPI1_BASE + 0x0c);
 | ||||||
|  |   while (lout == 0) | ||||||
|  |   { | ||||||
|  |     // do stuff to check response?
 | ||||||
|  |     lout = 1; | ||||||
|  | 
 | ||||||
|  |     // Read the SPI status register
 | ||||||
|  | 		///uint32_t statusSPI = *(uint32_t *)(SPI1_BASE + 0x08);
 | ||||||
|  | 		// Just bit 1 the transmit buffer empty flag - wait for this to go high then leave this function
 | ||||||
|  | 		/// &= BIT_1;
 | ||||||
|  | 		// The condition has been met so signal to get out of this loop
 | ||||||
|  | 		///if (statusSPI == BIT_1) lout = 1;
 | ||||||
|  |   } | ||||||
|  | 	return inbyte; | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | // send a 32 bit register value to the ADF4350
 | ||||||
|  | void SendSPIDataADF4350 (uint32_t outval) | ||||||
|  | { | ||||||
|  |   // split into 4 x 8-bit words
 | ||||||
|  |   uint8_t byte1 = (outval & 0xFF000000) >> 24; | ||||||
|  |   uint8_t byte2 = (outval & 0x00FF0000) >> 16; | ||||||
|  |   uint8_t byte3 = (outval & 0x0000FF00) >> 8; | ||||||
|  |   uint8_t byte4 = outval & 0x000000FF; | ||||||
|  | 
 | ||||||
|  | 	// send these to the ADF4350 via SPI
 | ||||||
|  | 	SendReceiveSPIData (byte1); | ||||||
|  | 	SendReceiveSPIData (byte2); | ||||||
|  |   SendReceiveSPIData (byte3); | ||||||
|  |   SendReceiveSPIData (byte4); | ||||||
|  | 	uint8_t lout = 0; | ||||||
|  | 	// Loop waiting for the the SPI BSY flag to go low
 | ||||||
|  | 	while (lout == 0) | ||||||
|  | 	{ | ||||||
|  | 		// Read the SPI status register
 | ||||||
|  | 		uint32_t statusSPI = *(uint32_t *)(SPI1_BASE + 0x08); | ||||||
|  | 		// Just bit 7 the SPI BSY flag - wait for this to go low then leave this function
 | ||||||
|  | 		statusSPI &= BIT_7; | ||||||
|  | 		// The condition has been met so signal to get out of this loop
 | ||||||
|  | 		if (statusSPI == 0) lout = 1; | ||||||
|  | 	} | ||||||
|  | 	// Add a delay here so the clock has gone low before LE is taken high
 | ||||||
|  | 	Delay(10); | ||||||
|  | 	// Take LE high to load the data into the register
 | ||||||
|  | 	*(uint32_t *)(GPIOA_BASE + 0x10) = BIT_2; | ||||||
|  | 	// Short delay while LE is high (minimum of 20ns)
 | ||||||
|  | 	Delay(30); | ||||||
|  | 	// Take LE low again
 | ||||||
|  | 	*(uint32_t *)(GPIOA_BASE + 0x14) = BIT_2; | ||||||
|  | } | ||||||
		Loading…
	
	Add table
		
		Reference in a new issue