Marco Vitchi Thulin
088864e670
Migrated PB5 references to PB0, that were left over from a previous commit. This also fixes the false lock status OK reporting bug.
138 lines
No EOL
3.6 KiB
C
138 lines
No EOL
3.6 KiB
C
#include<avr/io.h>
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#include "common.h"
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// PB3 - ADF4350 LE
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// PB2 - SCK to ADF4350 CLK
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// PB1 - DO (MOSI) to ADF4350 DATA
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// PB0 - ADF4350 LD
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// PB4 - Lock Status LED
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void Delay(uint32_t);
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uint8_t SendReceiveSPIData(uint8_t);
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void SendSPIDataADF4350 (uint32_t);
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int main()
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{
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// set instructions to configure the ADF4350 for a 1 GHz +5dBm output
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uint32_t ar0=0x500000;
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uint32_t ar1=0x8008011;
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uint32_t ar2=0x4e42;
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uint32_t ar3=0x4b3;
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uint32_t ar4=0xac803c;
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uint32_t ar5=0x580005;
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// alternative instructions for a 1001.25 MHz +5dBm output
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//uint32_t ar0=0x500008;
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//uint32_t ar1=0x8008029;
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//uint32_t ar2=0x4e42;
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//uint32_t ar3=0x4b3;
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//uint32_t ar4=0xac803c;
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//uint32_t ar5=0x580005;
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// set direction of PB1 (DO) and PB2 (USCK) as output
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DDRB=(1<<PB1)|(1<<PB2);
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// set to three wire mode (SPI)
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USICR=(1<<USIWM0);
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///USICR=(0<<USIWM1); not needed, already 0
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// set direction of PB4 (status LED) as output
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DDRB |= (1 << PB4);
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// set direction of PB3 (LE) as open-drain output
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DDRB |= (1 << PB3);
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// set PB3 (LE) low
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PORTB &= ~(1 << PORTB3);
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// set direction of PB0 (LD Input) as input
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DDRB &= ~(1 << DDB0);
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// enable pull-up resistor on PB0
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PORTB |= (1 << PORTB0);
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// flash the Status LED (PB4) to show that everything works
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PORTB |= (1 << PORTB4);
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Delay(500000);
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PORTB &= ~(1 << PORTB4);
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Delay(100000);
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// enter loop waiting for frequency lock to be achieved
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while (1)
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{
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// read the state of LD (PB0)
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uint8_t ldState = PINB & (1 << PINB0);
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// if LD (PB0) is low, turn on the LED (PB4)
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if (ldState == 0)
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PORTB |= (1 << PORTB4); // Turn on the LED
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else
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PORTB &= ~(1 << PORTB4); // Turn off the LED
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}
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}
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// general purpose delay
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void Delay(uint32_t tmax)
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{
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uint32_t i;
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for (i=0;i < tmax ; i++)
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{
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asm("nop");
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}
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}
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// send an 8 bit word via SPI1 and receive an 8 bit word at the same time
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uint8_t SendReceiveSPIData(uint8_t value)
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{
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uint8_t lout = 0;
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short int i=0;
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// prob change the 8 below to len of value?
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for(i=0;i<8;i++)
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{
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///USIDR = value[i]; // wrong way to do it apparently, still saving for future reference
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USIDR = (value >> i) & 0x01; // write data bytes in Data register, will cause them to get sent on clock
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while(USIOIF==0) // check USI data counter overflow flag to detect the end of transmission every byte
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{
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USICR|=(1<<USICLK)|(1<<USITC); // enable clock for transmission and generate clock for slave deivce
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}
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USISR|=(1<<USIOIF); // clear USI data counter overflow flag
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}
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// Read in a 16 bit frame
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///uint16_t inbyte = *(uint32_t *)(SPI1_BASE + 0x0c);
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//return inbyte;
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}
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// send a 32 bit register value to the ADF4350
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void SendSPIDataADF4350 (uint32_t outval)
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{
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// split into 4 x 8-bit words
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uint8_t byte1 = (outval & 0xFF000000) >> 24;
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uint8_t byte2 = (outval & 0x00FF0000) >> 16;
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uint8_t byte3 = (outval & 0x0000FF00) >> 8;
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uint8_t byte4 = outval & 0x000000FF;
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// send these to the ADF4350 via SPI
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SendReceiveSPIData (byte1);
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SendReceiveSPIData (byte2);
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SendReceiveSPIData (byte3);
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SendReceiveSPIData (byte4);
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// 2 x 16 version:
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// split into 2 x 16 bit words
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///uint16_t highWord = (outval & 0xffff0000) >> 16;
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///uint16_t lowWord = outval & 0x0000ffff;
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// send these to the ADF4350 via SPI
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///SendReceiveSPIData (highWord);
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///SendReceiveSPIData (lowWord);
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// delay so the clock has gone low before LE is taken high
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Delay(10);
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// pull LE high to load the data into the ADF4350 register
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PORTB |= (1 << PORTB3);
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// short delay while LE is high (minimum of 20ns)
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Delay(30);
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// pull LE low again
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PORTB &= ~(1 << PORTB3);
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} |